Exact emulation of a priority queue with a switch and delay lines

A.D. Sarwate and V. Anantharam

Queueing Systems: Theory and Applications, Vol 53, No. July, pp. 115--125, July 2006

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Abstract

All-optical packet switched networking is hampered by the problem of realizing viable queues for optical packets. Packets can be buffered in delay lines, but delay lines do not functionally emulate queues from an input-output point of view. In this paper we consider the problem of {\em exact} emulation of a priority queue of size $K$ using a switching system comprised of a switch of size $(M+1) \times (M+1)$, which has one distinguished input for external arrivals, one distinguished output for external departures, and fixed-length delay lines of lengths $L_1, L_2, \ldots, L_M$ connecting the other inputs and outputs in pairs. We measure the complexity of such an emulation by $M+1$. %We prove that $M = \Omega(\log K)$ We prove that $M \ge \lceil \log (K -1) \rceil$ and present a construction which works with $M = O(\sqrt{K})$; further, in our construction $\sum_{m=1}^M L_m = K + O(\sqrt{K})$. We also sketch an idea for an all-optical packet switched communication network architecture based on {\em approximate} emulation of priority queues of finite size using switches and delay lines, with erasure control coding at the packet level.

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Reference

A.D. Sarwate and V. Anantharam, Exact emulation of a priority queue with a switch and delay lines, Queueing Systems: Theory and Applications, vol. 53, no. 3, pp. 115--125, July 2006

BibTeX

@ARTICLE(SarwateA:06exact,
   AUTHOR = "A.D. Sarwate and V. Anantharam",
   TITLE = "Exact emulation of a priority queue with a switch and delay lines",
   JOURNAL = "Queueing Systems: Theory and Applications",
   VOLUME = "53",
   NUMBER = "3",
   PAGES = "115--125",
   MONTH = "July",
   YEAR = "2006",
   )