We present a reverse concatenation (RC) architecture using Reed-Solomon (RS) error correction codes. The scheme employs very-high-rate pre-RS modulation codes followed by RS parity symbol insertion.  The very-high-rate modulation codes in the RC scheme, which facilitate timing recovery and automatic gain control and reduce the detector path memory, are of the same type as the modulation codes that have been used in generalized partial-response maximum likelihood (PRML) detection systems.