Reed-Solomon (RS) codes are among the most extensively used error-correcting codes in digital communication
and storage systems. Compared with traditional hard-decision decoding, soft-decision decoding can correct
more errors by making use of the reliability information from the channel. Recently, significant advancements
have been made on algebraic soft-decision decoding (ASD) of RS codes. By incorporating the reliability
information from the channel into an algebraic interpolation process, substantial coding gain can be achieved
by these algorithms with a complexity that is polynomial with respect to the codeword length.

Despite that different multiplicity assignment schemes may be used, ASD algorithms share two major steps: the
interpolation and the factorization. In this talk, we first review available algorithms that can be used for
the implementation of these steps. Particularly, we focus on the Koetter and Lee-O'Sullivan algorithms for
the interpolation and the Roth-Ruckenstein algorithm for the factorization. Then the hardware implementation
bottlenecks of these algorithms are described. This talk also gives an overview of existing efforts on VLSI
architecture design for these algorithms. Comparisons and implementation results are provided, and future
research directions are outlined.