Emerging non-volatile memory devices are in high demand in a variety of applications, ranging from consumer electronics to data centers. These devices offer faster data access and lower power consumption than traditional storage devices based on magnetic disks. The advent of such multi-scale opportunities for new memory technologies also carries a unique set of design challenges. One of the main concerns regarding the performance of new memory devices is that of the memory lifetime. Memory lifetime is in direct proportion to the maximum number of times a memory block can be written (programmed) or erased before the memory is rendered unusable.

We will consider both the single level cell (SLC) technology where each memory cell stores exactly one bit of information, and the multi level cell technology (MLC) where each memory cell stores q (q>1) bits of information. MLC devices offer higher densities than their SLC counterparts. However, the number of allowed program/erase cycles is substantially lower for MLC, and it in fact decreases rapidly with the increase in density. In this talk we will discuss new coding schemes that can be used to extend memory lifetime. These schemes improve endurance by judiciously eliminating excessive programming cycles. In the context of MLC technology, we will also discuss how generalized write once memory (wom) codes can be used to combat endurance limitations. This result can be of particular interest in emerging flash technologies that aim to further increase cell density.