A network switch accepts packets from input ports at a specified data rate, and emits packets to output ports at a specified data rate. For switching flexibility, the incoming packets are written to a memory subsystem, and read from it to the outputs at a later time decided by the control hardware. The main challenge is that upon writing packets it is not known when, and in what order, they will be read. This may introduce bottlenecks to the read path and lower the switch throughput. In the talk we will describe a new coding framework and constructions that allow writing the incoming packets in a way that guarantees full-throughput reads, given precise specifications of the read flexibility. For several useful flexibility specifications, we give constructions and redundancy lower bounds.