The mathematical study of communications systems and the hardware implementation of the corresponding signal processing algorithms reside on two significantly different layers of abstraction which rarely interact. However, big hardware complexity gains often come from fundamentally re-thinking the problem at hand and hardware designers have pushed the boundaries to such an extent that low-level hardware impairments can not always be masked from the implemented algorithms.

In this talk, I summarize a part of my work that uses information theoretic and machine learning tools for the design and analysis of signal processing hardware. More specifically, I will discuss the analysis of LDPC and polar decoders that are implemented using unreliable hardware, the design of an optimal (in a mutual information sense) quantization scheme for LDPC decoding, and the use of neural networks for non-linear self-interference cancellation in full-duplex systems.